| US 7,462,868 B2 | ||
| Light emitting diode chip with double close-loop electrode design | ||
| Yun-Li Li, Tao-Yung Hsien (Taiwan); and Hui-Ching Feng, Tao-Yung Hsien (Taiwan) | ||
| Assigned to Formosa Epitaxy Incorporation, Tao-Yung Hsien (Taiwan) | ||
| Filed on Feb. 26, 2006, as Appl. No. 11/307,877. | ||
| Prior Publication US 2007/0200120 A1, Aug. 30, 2007 | ||
| Int. Cl. H01L 27/15 (2006.01) | ||
| U.S. Cl. 257—79 [257/91; 257/99] | 12 Claims |
| 1. A light emitting diode (LED) chip with double close-loop electrode design, comprising:
a substrate;
a first-type doped semiconductor layer, disposed on the substrate;
a light emitting layer, disposed on the first-type doped semiconductor layer and exposing a part of the first-type doped semiconductor
layer;
a second-type doped semiconductor layer, disposed on the light emitting layer;
a first electrode, disposed on the first-type doped semiconductor layer and having a close-loop pattern;
a second electrode, disposed on the second-type doped semiconductor layer, located inside a region encircled by the first
electrode and having a close-loop pattern encircling a hollow region which goes through the second-type doped semiconductor
layer and the light emitting layer for exposing a part of the first-type doped semiconductor layer; and
a plurality of micro-structures located on the surface of the first type doped semiconductor layer in the hollow region.
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