| US 7,614,028 B1 | ||
| Representation, configuration, and reconfiguration of routing method and system | ||
| Eric Nequist, Monte Sereno, Calif. (US); and Richard Brashears, San Jose, Calif. (US) | ||
| Assigned to Cadence Design Systems, Inc., San Jose, Calif. (US) | ||
| Filed on Apr. 27, 2007, as Appl. No. 11/741,668. | ||
| Claims priority of provisional application 60/795793, filed on Apr. 28, 2006. | ||
| Int. Cl. G06F 17/50 (2006.01) | ||
| U.S. Cl. 716—12 [716/13; 716/9; 716/10] | 57 Claims |
| 1. A method implemented with a processor, comprising:
identifying one or more routes for an integrated circuit design;
representing a first portion of the one or more routes at a first level of abstraction, wherein the first level of abstraction
corresponds to a route representation having semantics that allow interface with other levels of abstraction;
representing a second portion of the one or more routes at a second level of abstraction, the second level of abstraction
having a greater amount of routing detail as compared to the first level of abstraction, wherein the second level of abstraction
corresponds to a route representation having semantics that allow interface with other levels of abstraction; and
storing the one or more routes in a computer usable medium.
|