| US 7,603,489 B2 | ||
| Direct memory access controller including first and second transfer setting registers | ||
| Toru Ikeuchi, Kanagawa (Japan) | ||
| Assigned to NEC Electronics Corporation, Kawasaki, Kanagawa (Japan) | ||
| Filed on May 18, 2007, as Appl. No. 11/802,051. | ||
| Claims priority of application No. 2006-140687 (JP), filed on May 19, 2006. | ||
| Prior Publication US 2008/0005389 A1, Jan. 03, 2008 | ||
| Int. Cl. G06F 13/28 (2006.01) | ||
| U.S. Cl. 710—22 [710/23; 710/26; 710/28] | 20 Claims |
| 1. A direct memory access (DMA) controller to control a data transfer from a transfer source address to a transfer destination
address, the DMA controller comprising:
a first transfer setting register to store a setting value for one of three setting items, the setting items being the transfer
source address, the transfer destination address and a transfer count;
a second transfer setting register to store a setting value for the setting item corresponding to the setting value stored
in the first transfer setting register, the setting value being transferred to the first transfer setting register; and
a flag to control writing to the second transfer setting register.
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