US 7,599,225 B2
Method of programming and erasing a non-volatile memory array
Su-Chueh Loh, Miaoli (Taiwan); Chun-Hsiung Hung, Hsinchu (Taiwan); and Chi-Ling Chu, Dali (Taiwan)
Assigned to Macronix International Co., Ltd., Hsinchu (Taiwan)
Filed on Jul. 13, 2007, as Appl. No. 11/777,746.
Prior Publication US 2009/0016116 A1, Jan. 15, 2009
Int. Cl. G11C 16/06 (2006.01)
U.S. Cl. 365—185.22  [365/218; 365/189.011] 12 Claims
OG exemplary drawing
 
1. A method of processing an array of non-volatile memory cells to program or erase the same, by applying a voltage to the same through a program and verify pulse application circuit, comprising the steps of
selecting a voltage to be applied;
determining the maximum number of memory cells that can be processed simultaneously, based on the selected voltage and characteristics of the memory cells and the circuit;
grouping the array into processing groups, each group having a number of cells less than or equal to the maximum determined number; and
applying the voltage to the cells.