| US 7,598,800 B2 | ||
| Method and circuit for an efficient and scalable constant current source for an electronic display | ||
| Gurjit S. Thandi, San Jose, Calif. (US); Dilip S, Saratoga, Calif. (US); Hendrik Santo, San Jose, Calif. (US); and Kien Vi, Palo Alto, Calif. (US) | ||
| Assigned to mSilica Inc, Santa Clara, Calif. (US) | ||
| Filed on May 22, 2007, as Appl. No. 11/805,523. | ||
| Prior Publication US 2008/0290933 A1, Nov. 27, 2008 | ||
| Int. Cl. G05F 1/10 (2006.01) | ||
| U.S. Cl. 327—540 [323/316] | 9 Claims |
| 1. A constant current source circuit comprising:
a first operational amplifier having a non-inverting input, an inverting input, and an output;
a reference current source coupled to the inverting input of the first operational amplifier, wherein the reference current
determines the voltage applied to the inverting input;
a first transistor having gate, drain and source terminals and having a source current that is a function of the drain-to-source
voltage and the gate voltage and is independent of an additional offset current, wherein the drain terminal of the first transistor
is in series with the non-inverting input of the first operational amplifier and wherein the gate terminal of the first transistor
is connected to the output of the first operational amplifier;
a second transistor having gate, drain and source terminals and having a source current that is a function of the drain-to-source
voltage and the gate voltage and is independent of an additional offset current, wherein the gate terminal of the second transistor
is connected to the output of the first operational amplifier and wherein the source current of the second transistor is a
multiple of the source current of the first transistor for a given voltage on the output of the first operational amplifier;
a third transistor having gate, drain and source terminals, wherein the drain terminal of the third transistor is connected
to the non-inverting input of the first operational amplifier; and
a second operational amplifier having a non-inverting input, an inverting input, and an output, wherein the inverting input
of the second operational amplifier is connected to the source terminal of the third transistor and to the drain terminal
of the first transistor, and wherein the non-inverting input of the second operational amplifier is connected to the drain
terminal of the second transistor.
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