| US 7,576,564 B2 | ||
| Configurable IC with routing circuits with offset connections | ||
| Herman Schmit, Palo Alto, Calif. (US); Steven Teig, Menlo Park, Calif. (US); Brad Hutchings, Fremont, Calif. (US); and Randy Renfu Huang, San Jose, Calif. (US) | ||
| Assigned to Tabula Inc., Santa Clara, Calif. (US) | ||
| Filed on Oct. 08, 2007, as Appl. No. 11/868,959. | ||
| Application 11/868959 is a continuation of application No. 11/082193, filed on Mar. 15, 2005, granted, now 7,295,037. | ||
| Claims priority of provisional application 60/626322, filed on Nov. 08, 2004. | ||
| Prior Publication US 2008/0100339 A1, May 01, 2008 | ||
| Int. Cl. H03K 19/177 (2006.01) | ||
| U.S. Cl. 326—41 [326/38; 326/39] | 19 Claims |
| 1. An integrated circuit (“IC”) comprising:
a plurality of configurable tiles arranged in a tile arrangement,
each configurable tile having a set of configurable logic circuits and a set of configurable routing circuits for routing
signals between configurable logic circuits;
wherein at least a first routing circuit of a first tile has at least one direct connection with a second circuit of a second
tile that does not neighbor the first tile and that is not aligned horizontally or vertically with the first tile in the tile
arrangement; and
wherein said at least one direct connection has an intervening buffer circuit that is not an interconnect circuit.
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