| US 7,576,435 B2 | ||
| Low-cost and ultra-fine integrated circuit packaging technique | ||
| Clinton Chao, Hsin-Chu (Taiwan) | ||
| Assigned to Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu (Taiwan) | ||
| Filed on Apr. 27, 2007, as Appl. No. 11/796,297. | ||
| Prior Publication US 2008/0265399 A1, Oct. 30, 2008 | ||
| Int. Cl. H01L 23/48 (2006.01) | ||
| U.S. Cl. 257—778 [257/774] | 20 Claims |
| 1. A semiconductor package structure comprising:
an interposer;
a first plurality of bonding pads on a side of the interposer;
a semiconductor chip; and
a second plurality of bonding pads on a side of the semiconductor chip, wherein the first and the second plurality of bonding
pads are bonded through metal-to-metal bonds.
|