	US 7,575,960 B2
	Method for fabricating a thin film transistor matrix device
Hidaki Takizawa, Kawasaki (Japan); Shougo Hayashi, Kawasaki (Japan); Takeshi Kinjo, Kawasaki (Japan); Makoto Tachibanaki, Kawasaki (Japan); and Kenji Okamoto, Kawasaki (Japan)
Assigned to Sharp Kabushiki Kaisha, Osaka (Japan)
Filed on Mar. 16, 2006, as Appl. No. 11/377,754.
Application 11/377754 is a division of application No. 10/660053, filed on Sep. 11, 2003, granted, now 7,075,108.
Application 10/660053 is a division of application No. 10/080108, filed on Feb. 21, 2002, granted, now 6,767,754.
Application 10/080108 is a division of application No. 09/005176, filed on Jan. 08, 1998, granted, now 6,406,946.
Application 09/005176 is a continuation of application No. 08/669272, filed on May 29, 1996, granted, now 5,742,074.
Claims priority of application No. 1995-134400 (JP), filed on May 31, 1995.
Prior Publication US 2006/0163579 A1, Jul. 27, 2006
Int. Cl. H01L 21/00 (2006.01)

U.S. Cl. 438—149 [438/151; 257/E29.151; 349/192]

6 Claims

1. A method for fabricating a thin film transistor matrix device which comprises:

forming a transparent insulating substrate;

arranging a plurality of thin film transistors on the transparent insulating substrate in a matrix;

arranging a plurality of picture element electrodes on the transparent insulating substrate in a matrix and connecting the picture element electrodes to sources of the thin film transistors;

forming a plurality of bus lines for commonly connecting gates or drains of the thin film transistors;

forming a plurality of bus line terminals on the ends of the bus lines, respectively, each said bus line terminal being provided for each said bus line;

forming one connection line on said transparent insulating substrate in a region outer of said plurality of the bus line terminals and commonly connecting said plurality of bus lines; and

the method further comprising the step of electrically disconnecting the bus lines from the connection line by melting by laser beams.