| US 7,573,772 B2 | ||
| Semiconductor memory device and self-refresh method therefor | ||
| Kyung-Woo Nam, Seoul (Korea, Republic of); and Ho-Cheol Lee, Yongin-si (Korea, Republic of) | ||
| Assigned to Samsung Electronics Co., Ltd., Suwon-Si (Korea, Republic of) | ||
| Filed on Dec. 19, 2006, as Appl. No. 11/612,866. | ||
| Claims priority of application No. 10-2006-0055206 (KR), filed on Jun. 20, 2006. | ||
| Prior Publication US 2007/0297258 A1, Dec. 27, 2007 | ||
| Int. Cl. G11C 7/00 (2006.01) | ||
| U.S. Cl. 365—222 [365/196; 365/189.04; 365/189.14; 365/233.19] | 10 Claims |
| 1. A semiconductor memory device, comprising:
a plurality of input/output ports having respective independent operations of a first mode and a second mode, wherein a period
of a self-refresh mode through one of the plurality of input/output ports in the second mode is changed in response to the
first mode of operation through another input/output port; and
a refresh period control circuit,
wherein the self-refresh period is controlled to be shorter in the second mode than in the first mode, and
wherein the refresh period control circuit comprises:
an active mode sensing unit for sensing a start of the active mode of the first input/output port and generating a first pulse,
and sensing a completion of the active mode and generating a second pulse;
a refresh period conversion signal generator for generating a refresh period conversion signal enabled by the first pulse
and disabled by the second pulse output from the active mode sensing unit; and
a refresh period controller for controlling the self-refresh period in a self-refresh performed through the second input/output
port in response to the refresh period conversion signal.
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