| US 7,573,742 B2 | ||
| Nonvolatile semiconductor memory | ||
| Natsuo Ajika, Hyogo (Japan); Shoji Shukuri, Hyogo (Japan); Masaaki Mihara, Hyogo (Japan); and Moriyoshi Nakashima, Hyogo (Japan) | ||
| Assigned to Genusion, Inc., Hyogo (Japan) | ||
| Filed on Oct. 17, 2006, as Appl. No. 11/550,335. | ||
| Application 11/550335 is a continuation in part of application No. 10/598853, filed on Oct. 12, 2006, granted, now 7,515,479. | ||
| Prior Publication US 2007/0230251 A1, Oct. 04, 2007 | ||
| Int. Cl. G11C 16/04 (2006.01) | ||
| U.S. Cl. 365—185.05 [365/185.08] | 53 Claims |
| 1. A nonvolatile semiconductor memory comprising an n type well and a PMOS cell transistor characterized in that, during programming,
said n type well is applied with a first positive potential;
a drain of said PMOS cell transistor is applied with a low potential; and
a gate and a source of said PMOS cell transistor are applied with second and third positive potentials respectively,
wherein said first and said second positive potentials are greater than said third positive potential, and
wherein said third positive potential is greater than said low potential and less than 5 V.
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