US 7,573,314 B2
Level shift circuit
Atsushi Nagayama, Tokyo (Japan)
Assigned to Oki Semiconductor Co., Ltd., Tokyo (Japan)
Filed on Jun. 17, 2008, as Appl. No. 12/140,553.
Claims priority of application No. 2007-191184 (JP), filed on Jul. 23, 2007.
Prior Publication US 2009/0027101 A1, Jan. 29, 2009
Int. Cl. H03L 5/00 (2006.01)
U.S. Cl. 327—333  [326/63; 326/81] 5 Claims
OG exemplary drawing
 
1. A level shift circuit comprising:
an input circuit section that operates by the supply of electrical power from a first power supply voltage;
an output circuit section, electrically connected to the input circuit section, that operates by the supply of electrical power from a second power supply voltage different from the first power supply voltage;
a level converter circuit, disposed in the output circuit section, including an N-channel first transistor and an N-channel second transistor having grounded sources; a P-channel third transistor having a source connected to a power supply line of the second power supply voltage, a drain connected to the drain of the first transistor, and a gate connected to the drain of the second transistor; and a fourth transistor having a source connected to a power supply line of the second power supply voltage, a drain connected to the drain of the second transistor, and a gate connected to the drain of the first transistor;
a first converter circuit that operates by the supply of electrical power from the second power supply voltage and converts and outputs a power supply cut off control signal inputted from the outside of the output circuit section;
a second converter circuit that operates by the supply of electrical power from the second power supply voltage and converts and outputs a signal inputted from the first converter circuit;
a third converter circuit that operates by the supply of electrical power from the first power supply voltage and converts and outputs a signal inputted from the first converter circuit;
a fixing circuit, disposed in the output circuit section, that fixes a signal level to be outputted from the output circuit section, based on the output from the level converter circuit and a control signal outputted from the second converter circuit;
a first generator circuit, disposed in the input circuit section, that generates a control signal to be outputted to the gate of the first transistor, based on an input signal inputted from outside of the input circuit section, the signal outputted from the second converter circuit and the signal outputted from the third converter circuit; and
a second generator circuit, disposed in the input circuit section, that generates a control signal to be outputted to the gate of the second transistor, based on the signal generated by the first generator circuit, the signal outputted from the second converter circuit and the signal outputted from the third converter circuit.