| US 7,549,133 B2 | ||
| System and method for qualifying a logic cell library | ||
| Sung Youn Lee, Seoul (Korea, Republic of); and Yong Chul Jeon, Goyang-si (Korea, Republic of) | ||
| Assigned to Dongbu Electronics Co., Ltd., Seoul (Korea, Republic of) | ||
| Filed on Dec. 27, 2006, as Appl. No. 11/645,527. | ||
| Claims priority of application No. 10-2005-0130780 (KR), filed on Dec. 27, 2005. | ||
| Prior Publication US 2007/0148705 A1, Jun. 28, 2007 | ||
| Int. Cl. G06F 17/50 (2006.01) | ||
| U.S. Cl. 716—1 [716/18] | 13 Claims |

| 1. A system for qualifying a logic cell library, the system comprising:
a format transformer transforming a new library into a format suitable for a predetermined qualifier;
a sample generator creating a qualification cell sample capable of qualifying cells of the new library;
a cell matching tool performing a one-to-one cell comparison between cells of the new library and cells of an existing library
and, if a mismatched cell of the new library does not exist in the existing library, updating the existing library by obtaining
the mismatched cell from a cell bank;
a function qualifier determining whether or not a right value is output with respect to an input value in order to qualify
a cell function of the new library;
a processing rate qualifier measuring a time required from signal input to signal output in order to qualify a cell processing
rate of the new library;
a power consumption qualifier measuring power consumed during a process of a cell of the new library;
an inter-qualifier determining whether or not logical design information and physical design information of the new library
suitably correspond to each other; and
a qualification library storing the new library qualified by the function qualifier, the processing rate qualifier, the power
consumption qualifier, and the inter-qualifier.
|