| US 7,548,179 B2 | ||
| MASH sigma delta modulator | ||
| Saket Jalan, Karnataka (India) | ||
| Assigned to Texas Instruments Incorporated, Dallas, Tex. (US) | ||
| Filed on Oct. 29, 2007, as Appl. No. 11/926,148. | ||
| Prior Publication US 2009/0109076 A1, Apr. 30, 2009 | ||
| Int. Cl. H03M 3/00 (2006.01) | ||
| U.S. Cl. 341—143 [341/155] | 19 Claims |
| 13. An integrated circuit comprising:
a processor;
a sigma-delta amplitude modulation unit coupled to the processor;
a digital frequency conversion unit coupled to the processor; and
a power amplifier coupled to the sigma-delta amplitude modulation unit and the digital frequency conversion unit,
wherein the sigma-delta amplitude modulation unit comprises a multi-stage sigma delta modulator comprising:
first stage accumulators directly coupled to corresponding second stage accumulators for processing input data bits; and
a combiner configured to assemble outputs from the accumulators to provide a processed output data.
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