US 7,547,967 B2
Semiconductor device and method of manufacturing the same
Hiroyasu Jobetto, Hachioji (Japan); and Ichiro Mihara, Tachikawa (Japan)
Assigned to Casio Computer Co., Ltd., Tokyo (Japan)
Filed on Feb. 05, 2007, as Appl. No. 11/671,318.
Application 11/671318 is a continuation of application No. 10/826039, filed on Apr. 16, 2004, granted, now 7,294,922.
Application 10/826039 is a continuation of application No. PCT/JP03/09958, filed on Aug. 05, 2003.
Claims priority of application No. 2002-232289 (JP), filed on Aug. 09, 2002; application No. 2002-232737 (JP), filed on Aug. 09, 2002; and application No. 2002-254695 (JP), filed on Aug. 30, 2002.
Prior Publication US 2007/0126128 A1, Jun. 07, 2007
This patent is subject to a terminal disclaimer.
Int. Cl. H01L 21/58 (2006.01)
U.S. Cl. 257—734 20 Claims
OG exemplary drawing
 
1. A semiconductor device comprising:
a semiconductor construction assembly including: (i) a semiconductor substrate having first and second surfaces that are mutually opposed to each other, and a plurality of side surfaces between the first surface and the second surface, (ii) an integrated circuit element formed on the first surface, (iii) a plurality of connection pads which are arranged on the first surface and connected to the integrated circuit element, (iv) a protective layer which is formed to cover the first surface of the semiconductor substrate and which has openings for exposing the connection pads, (v) a plurality of conductors which are connected to the connection pads and arranged on the protective layer and which have pads, (vi) columnar electrodes formed on the pads of the conductors, and (vii) a sealing film formed between the columnar electrodes and on the protective layer;
a sealing member which covers at least one side surface of the semiconductor construction assembly extending from the substrate to the sealing film;
an upper insulating layer which covers the semiconductor construction assembly and the sealing member except for portions corresponding to the columnar electrodes so as to expose an upper surface of each of the columnar electrodes;
upper conductors which are formed on the upper insulating layer, and each of which includes one end that is electrically connected to the pad of one of the conductors via one of the columnar electrodes and at least one external connection pad;
wherein an external connection pad of at least one of the upper conductors is disposed in a region opposing the sealing member.