| US 7,547,942 B2 | ||
| Nonvolatile memory devices and methods of fabricating the same | ||
| Sang-Hun Jeon, Yongin-si (Korea, Republic of); Chang-Seok Kang, Seongnam-si (Korea, Republic of); Jung-Dal Choi, Suwon-si (Korea, Republic of); Jin-Taek Park, Suwon-si (Korea, Republic of); Woong-Hee Sohn, Seoul (Korea, Republic of); and Won-Seok Jung, Yongin-si (Korea, Republic of) | ||
| Assigned to Samsung Electronics Co., Ltd., Suwon-si, Gyeonggi-do (Korea, Republic of) | ||
| Filed on Feb. 23, 2007, as Appl. No. 11/709,816. | ||
| Claims priority of application No. 10-2006-0109128 (KR), filed on Nov. 06, 2006. | ||
| Prior Publication US 2008/0105918 A1, May 08, 2008 | ||
| Int. Cl. H01L 21/00 (2006.01) | ||
| U.S. Cl. 257—324 [257/326; 257/315] | 11 Claims |
| 1. A nonvolatile memory device, comprising:
a semiconductor substrate including a cell region and a peripheral circuit region;
a cell gate on the cell region; and
a peripheral circuit gate on the peripheral circuit region,
wherein:
the cell gate includes a charge storage insulating layer on the semiconductor substrate, a gate electrode on the charge storage
insulating layer, and a conductive layer on the gate electrode,
the peripheral circuit gate includes a gate insulating layer on the semiconductor substrate, a semiconductor layer on the
gate insulating layer, an ohmic layer on the semiconductor layer, and the conductive layer on the ohmic layer, and
the cell gate does not include the ohmic layer.
|