| US 7,529,914 B2 | ||
| Method and apparatus for speculative execution of uncontended lock instructions | ||
| Bratin Saha, San Jose, Calif. (US); Matthew C. Merten, Hillsboro, Oreg. (US); and Per Hammarlund, Hillsboro, Oreg. (US) | ||
| Assigned to Intel Corporation, Santa Clara, Calif. (US) | ||
| Filed on Jun. 30, 2004, as Appl. No. 10/883,519. | ||
| Prior Publication US 2006/0004998 A1, Jan. 05, 2006 | ||
| Int. Cl. G06F 7/38 (2006.01); G06F 9/00 (2006.01); G06F 9/44 (2006.01); G06F 15/00 (2006.01) | ||
| U.S. Cl. 712—220 [712/233; 712/239; 712/243; 712/208] | 31 Claims |
| 1. A processor, comprising:
a predictor to issue a prediction whether a lock instruction is contended;
a scheduler to issue a set of micro-operations corresponding to said lock instruction speculatively when said prediction is
that said lock instruction is not contended; and
monitor logic to determine if a contended indication occurs, wherein said contended indication is when a store with unlock
micro-operation misses in a cache and said processor restarts processing of said lock instruction when said monitor logic
determines that a contended indication occurs.
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