a delay generator that provides an analog delayed signal, wherein the analog delayed signal lags an analog current input signal by a predetermined time delay, wherein the delay generator includes:

an analog-to-digital converter (ADC) that digitizes a currently received analog input signal to generate a digitized input signal,

a memory element having a plurality of memory locations, wherein the digitized input signal is stored a first memory location of the plurality of memory locations, wherein the digitized input signal is shifted from the first memory location to one or more second memory locations, wherein each second memory location is associated with a time delay,

addressing circuitry for selecting one of the one or more second memory locations, and

a first digital-to-analog converter (DAC) that regenerates the analog delayed signal from the selected one of the one or more second memory locations;

a multiplier that multiplies the analog delayed signal with the analog current input signal to generate a multiplied output;

an integrator that integrates the multiplied output to generate correlation data; and

a Medium Access Control (MAC) module that detects a signal type based upon the correlation data matching a signature of the signal type, wherein the signature is associated with the predetermined time delay.