| US 7,528,449 B2 | ||
| Semiconductor device including ESD protective element | ||
| Chie Sutou, Fujisawa (Japan); and Hirobumi Kawashima, Tokyo (Japan) | ||
| Assigned to Kabushiki Kaisha Toshiba, Minato-ku, Tokyo (Japan) | ||
| Filed on Oct. 17, 2006, as Appl. No. 11/581,744. | ||
| Claims priority of application No. 2005-308629 (JP), filed on Oct. 24, 2005. | ||
| Prior Publication US 2007/0090414 A1, Apr. 26, 2007 | ||
| Int. Cl. H01L 23/62 (2006.01) | ||
| U.S. Cl. 257—355 [257/E29.112] | 19 Claims |
| 13. A semiconductor device comprising:
a plurality of gate electrodes which are arrayed in parallel on a semiconductor region on a semiconductor substrate;
a source region and a drain region which are formed in the semiconductor region on both sides of each gate electrode;
a plurality of source contacts which are formed on the source region;
a plurality of drain contacts which are formed on the drain region;
a plurality of first substrate contacts which are formed on the semiconductor substrate and electrically connect to the semiconductor
substrate, the first substrate contacts being arrayed in a direction parallel to the plurality of gate electrodes;
a plurality of second substrate contacts which are formed on the semiconductor substrate and electrically connect to the semiconductor
substrate, the second substrate contacts being arrayed in a direction perpendicular to the plurality of gate electrodes; and
a salicide block formed between the gate electrode and the plurality of drain contacts, the salicide block preventing silicidation
on the drain region and having a length in a channel length direction that increases as distances from the first substrate
contacts and the second substrate contacts increase.
|