US 7,527,984 B2
Semiconductor device
Koji Yamakawa, Tokyo (Japan); and Soichi Yamazaki, Yokohama (Japan)
Assigned to Kabushiki Kaisha Toshiba, Tokyo (Japan)
Filed on Jul. 10, 2006, as Appl. No. 11/482,909.
Claims priority of application No. 2005-293440 (JP), filed on Oct. 06, 2005.
Prior Publication US 2007/0080383 A1, Apr. 12, 2007
Int. Cl. H01L 21/00 (2006.01)
U.S. Cl. 438—3  [438/381; 257/295; 257/E27.048] 15 Claims
OG exemplary drawing
 
1. A semiconductor device comprising:
a semiconductor substrate;
a ferroelectric capacitor arranged above the semiconductor substrate;
an insulating protecting film covering a side surface of the ferroelectric capacitor; and
a side wall film formed only on a side surface of the ferroelectric capacitor through the protecting film and giving tensile stress to the ferroelectric capacitor in a direction of an electric field applied to the ferroelectric capacitor, wherein the side wall film has intrinsic compression stress.