US 7,527,547 B2
Wafer processing method
Keiichi Kajiyama, Tokyo (Japan); and Tadato Nagasawa, Tokyo (Japan)
Assigned to Disco Corporation, Tokyo (Japan)
Filed on May 07, 2007, as Appl. No. 11/797,741.
Claims priority of application No. 2006-133546 (JP), filed on May 12, 2006.
Prior Publication US 2007/0264912 A1, Nov. 15, 2007
Int. Cl. B24B 1/00 (2006.01)
U.S. Cl. 451—41  [451/54; 451/55; 451/63] 2 Claims
OG exemplary drawing
 
1. A method of processing a wafer having a device area in which a plurality of devices are formed and a peripheral excess area surrounding the device area, comprising:
an annular groove forming step for forming an annular groove having a predetermined depth and a predetermined width, in a rear surface of the wafer, at a boundary between the device area and the peripheral excess area by positioning a cutting blade at the boundary and turning a chuck table holding the wafer while the cutting blade is rotated; and
a reinforcement forming step for grinding the device area of the rear surface of the wafer, in which the annular groove has been formed, to reduce the thickness of only the device area to a predetermined thickness and thereby allow the peripheral excess area of the rear surface of the wafer to be left behind so as to form an annular reinforcement.