| US 7,518,431 B2 | ||
| Semiconductor integrated circuit for processing audio and video signals | ||
| Taku Kobayashi, Kyoto (Japan); and Keiichi Fujii, Kusatsu (Japan) | ||
| Assigned to Panasonic Corporation, Osaka (Japan) | ||
| Filed on Sep. 22, 2005, as Appl. No. 11/232,683. | ||
| Claims priority of application No. 2004-281581 (JP), filed on Sep. 28, 2004. | ||
| Prior Publication US 2006/0072696 A1, Apr. 06, 2006 | ||
| Int. Cl. G05F 1/10 (2006.01); G05F 3/02 (2006.01) | ||
| U.S. Cl. 327—536 [327/534; 327/535; 327/537; 348/500; 348/571] | 5 Claims |

| 1. A semiconductor integrated circuit comprising:
a power source input terminal that inputs a power source voltage;
a GND input terminal that inputs a GND potential;
a control voltage input terminal that inputs an ON/OFF control voltage;
an oscillation circuit that outputs a clock signal;
a charge pump circuit that is connected to a capacitor and operates based on the ON/OFF control voltage and the clock signal,
the charge pump circuit causing the capacitor to charge or discharge repeatedly based on the clock signal when the ON/OFF
control voltage is ON;
a first delay circuit that delays the ON/OFF control voltage;
a switch that is connected between the charge pump circuit and the GND input terminal and operates based on the ON/OFF control
voltage outputted from the first delay circuit, the switch shorting the output terminal of the charge pump circuit and the
GND input terminal when the ON/OFF control voltage is OFF, and opening when the ON/OFF control voltage is ON;
a first circuit block that is driven by a power voltage which is supplied from the power source input terminal and the output
terminal of the charge pump circuit; and
a second circuit block that is driven by a power voltage which is supplied from the power source input terminal and the GND
input terminal;
wherein the first circuit block and the second circuit block are mounted on the same semiconductor integrated circuit chip.
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