US 7,518,224 B2
Offset integrated circuit package-on-package stacking system
Il Kwon Shim, Singapore (Singapore); Byung Joon Han, Singapore (Singapore); and Seng Guan Chow, Singapore (Singapore)
Assigned to Stats Chippac Ltd., Singapore (Singapore)
Filed on May 15, 2006, as Appl. No. 11/383,403.
Claims priority of provisional application 60/594884, filed on May 16, 2005.
Prior Publication US 2007/0108581 A1, May 17, 2007
Int. Cl. H01L 23/02 (2006.01); H01L 23/48 (2006.01); H01L 21/00 (2006.01)
U.S. Cl. 257—686  [257/E23.085; 257/E25.023; 257/E23.069; 257/E25.013; 257/685; 257/777; 257/723; 257/737; 257/778; 257/678] 20 Claims
OG exemplary drawing
 
1. An offset integrated circuit package-on-package stacking system comprising:
providing a base substrate;
forming a contact pad on the base substrate;
mounting a first integrated circuit on the base substrate;
forming a base package body around the first integrated circuit;
providing an offset substrate;
mounting a second integrated circuit on the offset substrate; and
coupling the offset substrate to the contact pad, including placing the offset substrate over only a portion of the base package body to leave exposed a portion of the top of the base substrate.