| US 7,518,211 B2 | ||
| Chip and package structure | ||
| Jui-Meng Jao, Miaoli County (Taiwan) | ||
| Assigned to United Microelectronics Corp., Hsinchu (Taiwan) | ||
| Filed on Nov. 11, 2005, as Appl. No. 11/164,135. | ||
| Prior Publication US 2007/0108623 A1, May 17, 2007 | ||
| Int. Cl. H01L 27/082 (2006.01); H01L 29/40 (2006.01) | ||
| U.S. Cl. 257—529 [257/773; 257/786; 257/E23.149] | 17 Claims |
| 1. A chip comprising:
a substrate having an underlayer and a plurality of pads located on the underlayer;
a passivation layer located on the underlayer, wherein the passivation layer has a plurality of openings and recesses formed
therein and the openings expose the pads respectively, and a bottom of the recesses exposing the underlayer and wherein the
substrate possesses a fuse region and a non-fuse region and the recesses are located in the non-fuse region.
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