US 7,518,205 B2
Semiconductor package and method for manufacturing the same
Katsunori Suzuki, Hamamatsu (Japan); and Tetsutsugu Hamano, Iwata-gun (Japan)
Assigned to Yamaha Corporation, Shizuoka-Ken (Japan)
Filed on Mar. 09, 2005, as Appl. No. 11/74,747.
Claims priority of application No. 2004-089141 (JP), filed on Mar. 25, 2004.
Prior Publication US 2005/0214979 A1, Sep. 29, 2005
Int. Cl. H01L 31/0232 (2006.01)
U.S. Cl. 257—432  [257/433; 257/704; 257/E31.127] 5 Claims
OG exemplary drawing
 
1. A semiconductor package comprising:
a semiconductor device requiring airtightness which is disposed on a substrate; a plurality of leads fixed to said substrate by hermetic sealing; and a sealing cover bonded to said substrate through a seal ring, wherein:
said substrate is made of a metal alloy selected from the group including tungsten-copper alloys, tungsten-silver alloys, molybdenum-copper alloys and molybdenum-silver alloys;
material for said hermetic sealing is directly bonded to said substrate without an intervening nickel plating layer therebetween to fix said plurality of leads to said substrate;
said seal ring is bonded to said substrate by brazing without an intervening nickel plating layer therebetween; and
surfaces of said leads after said hermetic sealing and a surface of said seal ring after said brazing are nickel plated and gold plated.