| US 7,518,186 B2 | ||
| Vertical gate semiconductor device and method for manufacturing the same | ||
| Shuji Mizokuchi, Niigata (Japan) | ||
| Assigned to Panasonic Corporation, Osaka (Japan) | ||
| Filed on Jun. 29, 2007, as Appl. No. 11/819,784. | ||
| Claims priority of application No. 2006-191472 (JP), filed on Jul. 12, 2006; and application No. 2007-112796 (JP), filed on Apr. 23, 2007. | ||
| Prior Publication US 2008/0012069 A1, Jan. 17, 2008 | ||
| Int. Cl. H01L 29/94 (2006.01) | ||
| U.S. Cl. 257—330 [257/331; 257/332; 257/333; 257/334] | 8 Claims |
| 1. A vertical gate semiconductor device, comprising:
a first conductivity type drain region formed on a substrate;
a second conductivity type first body region provided on the drain region;
a trench formed so as to pass through the first body region;
a gate electrode formed in the trench with a gate insulting film interposed so as to form a recessed portion at an upper part
of the trench;
an insulating film formed on the gate electrode so as to occupy the recessed portion partway;
a first conductivity type source region formed in at least a region of an upper part of the first body region which serves
as a wall part of the trench so as to overlap in level with at least an upper part of the gate electrode;
a second conductivity type second body region formed in a region of the upper part of the first body region other than the
at least region thereof so as to be adjacent to the source region in a direction that the trench extends;
a second conductivity type third body region formed in respective upper parts of the source region and the second body region;
and
a wiring layer in contact with the source region, the second body region, and the third body region.
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