| US 7,518,180 B2 | ||
| Nonvolatile semiconductor memory device and method for fabricating the same | ||
| Masatoshi Arai, Nara (Japan); and Keita Takahashi, Nara (Japan) | ||
| Assigned to Panasonic Corporation, Osaka (Japan) | ||
| Filed on May 06, 2005, as Appl. No. 11/123,169. | ||
| Claims priority of application No. 2004-212112 (JP), filed on Jul. 20, 2004. | ||
| Prior Publication US 2006/0017121 A1, Jan. 26, 2006 | ||
| Int. Cl. H01L 29/00 (2006.01) | ||
| U.S. Cl. 257—321 | 5 Claims |
| 1. A nonvolatile semiconductor memory device comprising:
a gate dielectric made of a multilayer dielectric that is formed on a substrate and discretely accumulates charges;
a gate electrode formed on the gate dielectric;
a pair of diffusion regions formed in the surface of the substrate with the gate electrode interposed therebetween and serving
as a source and a drain; and
a channel region existing between the diffusion regions,
wherein at least one of regions of the gate dielectric located between the pair of diffusion regions and lateral end parts
of the gate electrode opposed to the diffusion regions includes a fixed charge accumulation region in which charges produced
by irradiating the gate electrode with ultraviolet light can be accumulated, and
at least one said diffusion region located below the fixed charge accumulation region is formed to overlap with the fixed
charge accumulation region in plan configuration and extend beyond the fixed charge accumulation region toward the middle
of the channel region in plan configuration.
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