| US 7,518,144 B2 | ||
| Element for solid-state imaging device | ||
| Tatsuya Hirata, Osaka (Japan); and Shouzi Tanaka, Nara (Japan) | ||
| Assigned to Panasonic Corporation, Osaka (Japan) | ||
| Filed on Jan. 17, 2007, as Appl. No. 11/653,919. | ||
| Claims priority of application No. 2006-048483 (JP), filed on Feb. 24, 2006. | ||
| Prior Publication US 2007/0200148 A1, Aug. 30, 2007 | ||
| Int. Cl. H01L 29/10 (2006.01) | ||
| U.S. Cl. 257—59 [257/325] | 3 Claims |
| 1. An element for a solid-state imaging device comprising:
a signal accumulation region, of a second conductivity type, provided in an interior of a semiconductor substrate of a first
conductivity type or in an interior of a well of the first conductivity type, for accumulating a signal charge generated by
performing photoelectric conversion;
a gate electrode provided on the semiconductor substrate or the well;
a drain region, of the second conductivity type, provided on a surface portion of the semiconductor substrate or a surface
portion of the well; and
an element isolation region formed on the surface portion of the semiconductor substrate or the surface portion of the well,
wherein
the element isolation region has an STI (Shallow Trench Isolation) structure, a cavity is formed in an interior of the element
isolation region, and a thickness of a portion of the element isolation region above the cavity is substantially the same.
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