| US 7,517,788 B2 | ||
| System, apparatus, and method for advanced solder bumping | ||
| Mengzhi Pang, Phoenix, Ariz. (US); Christopher J. Bahr, Maricopa, Ariz. (US); Ravindra Tanikella, Phoneix, Ariz. (US); and Charan Gurumurthy, Higley, Ariz. (US) | ||
| Assigned to Intel Corporation, Santa Clara, Calif. (US) | ||
| Filed on Dec. 29, 2005, as Appl. No. 11/321,103. | ||
| Prior Publication US 2007/0152024 A1, Jul. 05, 2007 | ||
| Int. Cl. H01L 21/44 (2006.01); H01L 23/48 (2006.01) | ||
| U.S. Cl. 438—613 [438/612; 438/615; 257/E21.508] | 10 Claims |
| 1. A method comprising:
providing solder resist material on a surface of a substrate, the solder resist material having a substantially planar upper
surface;
forming an opening through the solder resist material;
applying solder resistant mask (SRM) material on the upper surface of the solder resist material having the opening therethrough,
wherein the solder resist material and the SRM material applied thereto are aligned to create an opening through both the
solder resist material and the SRM material;
reflowing solder located in the opening formed through both the solder resist material and the SRM material to create a solder
bump; and
removing the mask material after the reflowing of the solder.
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