| US 7,517,779 B2 | ||
| Recessed drain extensions in transistor device | ||
| Lindsey H. Hall, Phoenix, Ariz. (US) | ||
| Assigned to Texas Instruments Incorporated, Dallas, Tex. (US) | ||
| Filed on Jul. 02, 2007, as Appl. No. 11/772,508. | ||
| Application 11/772508 is a division of application No. 10/967766, filed on Oct. 18, 2004, granted, now 7,253,086. | ||
| Prior Publication US 2007/0278524 A1, Dec. 06, 2007 | ||
| Int. Cl. H01L 21/3205 (2006.01); H01L 21/4763 (2006.01) | ||
| U.S. Cl. 438—589 [438/303; 257/369; 257/387] | 7 Claims |
| 1. An integrated circuit transistor, formed by steps comprising:
providing a first semiconductor region;
forming a gate structure in a fixed position relative to the first semiconductor region, the gate structure having a first
sidewall and a second sidewall;
forming at least a first layer adjacent the first sidewall and the second sidewall;
forming a first recess in the first semiconductor region and extending laterally outward from the gate structure in one direction;
forming a second recess in the first semiconductor region and extending laterally outward from the gate structure in another
direction;
first, oxidizing the first and second recesses such that an oxidized material is formed in the first and second recesses;
second, stripping at least a portion of the oxidized material; and
third, forming a second semiconductor region in the at least one the first recess.
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