forming an electrode on a semiconductor substrate and forming a drain/source region in the semiconductor substrate beside the electrode;

forming a spacer on at least one sidewall of the electrode;

performing a process operation on the semiconductor substrate using the spacer as a mask and forming a material layer on the surface or the top of the drain/source region and the electrode;

performing a deposition process to blanketly deposit a protective layer on the material layer and the spacer, such that the protective layer has a first thickness on the spacer and a second thickness on the material layer and the first thickness is less than the second thickness;

performing a first etching process to partially remove the protective layer, such that all the portion of the protective layer on the spacer is substantially removed, and all the portion of the protective layer on the material layer has a remained thickness less than the second thickness;

performing a second etching process to substantially remove all of the spacer, wherein the spacer has an etching selectivity with respect to the protective layer;

forming a contact etch stop layer covering the electrode and the drain/source region;

forming an interlayer dielectric layer covering the contact etch stop layer;

performing a third etching process to etch through the interlayer dielectric layer and stop at the contact etch stop layer; and

performing a fourth etching process to etch through the contact etch stop layer and the protective layer and expose the drain/source region to form a contact hole.