| US 7,517,761 B2 | ||
| Method for manufacturing semiconductor device | ||
| Ching-Hung Kao, Hsinchu Hsien (Taiwan); and Chin-Shun Lin, Miaoli County (Taiwan) | ||
| Assigned to United Microelectronics Corp., Hsinchu (Taiwan) | ||
| Filed on Oct. 19, 2007, as Appl. No. 11/874,928. | ||
| Application 11/874928 is a division of application No. 11/306817, filed on Jan. 12, 2006, granted, now 7,449,748. | ||
| Prior Publication US 2008/0038911 A1, Feb. 14, 2008 | ||
| Int. Cl. H01L 21/8234 (2006.01) | ||
| U.S. Cl. 438—275 [438/454] | 11 Claims |
| 1. A method for manufacturing a field plate of a high voltage device located on a drift region of a substrate, wherein an
isolation structure is located on the drift region, the method comprising:
forming a first dielectric layer over the substrate;
forming a first patterned conductive layer on the first dielectric layer, wherein the first patterned conductive layer is
located over the isolation structure and exposes a portion of a top surface of the first dielectric layer;
removing the exposed portion of the first dielectric layer until a top surface of the isolation structure so as to form a
plurality of vertical fin-type dielectric bottoms; and
forming a second patterned conductive layer over the substrate, wherein the second patterned conductive layer extends downwardly
from the top of the first patterned conductive layer and covers the sidewall of each vertical fin-type dielectric bottoms
and a portion of the isolation structure exposed by the vertical fin-type dielectric bottoms, and the second patterned conductive
layer is insulated from the first patterned conductive layer.
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