| US 7,517,746 B2 | ||
| Metal oxide semiconductor transistor with Y shape metal gate and fabricating method thereof | ||
| Chin-Hsiang Lin, Hsin-Chu (Taiwan); Chia-Jung Hsu, Changhua County (Taiwan); and Li-Wei Cheng, Hsin-Chu (Taiwan) | ||
| Assigned to United Microelectronics Corp., Science-Based Industrial Park, Hsin-Chu (Taiwan) | ||
| Filed on Apr. 24, 2007, as Appl. No. 11/739,111. | ||
| Prior Publication US 2008/0265322 A1, Oct. 30, 2008 | ||
| Int. Cl. H01L 21/336 (2006.01); H01L 21/8234 (2006.01); H01L 21/4763 (2006.01) | ||
| U.S. Cl. 438—197 [438/585; 438/589; 257/E21.409; 257/E21.419; 257/E21.428; 257/E21.429] | 16 Claims |
| 1. A method of manufacturing a metal oxide semiconductor transistor with a metal gate, comprising:
providing a substrate, a gate temporary layer formed on the substrate, a spacer surrounding the gate temporary layer, the
substrate having two doping regions on two sides of the gate temporary layer respectively;
forming an insulating layer on the gate temporary layer, the spacer and the substrate forming a dielectric layer on the insulating
layer;
removing the partial dielectric layer to expose the insulating layer;
removing the gate temporary layer and the insulating layer positioned on the gate temporary layer, and forming a bevel edge
and a recess, the bevel edge covering the spacer, and the recess being surrounded by the spacer;
forming a barrier layer covering the inner sidewall of the recess, the bevel edge and the remaining dielectric layer;
forming a conductive layer in the recess, and on the bevel edge and the remaining dielectric layer; and
removing the barrier layer and the conductive layer positioned on the remaining dielectric layer to form a metal gate.
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