| US 7,473,929 B2 | ||
| Semiconductor device and method for fabricating the same | ||
| Osamu Kusumoto, Nara (Japan); Makoto Kitabatake, Nara (Japan); Masao Uchida, Osaka (Japan); Kunimasa Takahashi, Osaka (Japan); Kenya Yamashita, Osaka (Japan); Masahiro Hagio, Shiga (Japan); and Kazuyuki Sawada, Osaka (Japan) | ||
| Assigned to Panasonic Corporation, Osaka (Japan) | ||
| Filed on Jul. 01, 2004, as Appl. No. 10/880,550. | ||
| Claims priority of application No. 2003-189980 (JP), filed on Jul. 02, 2003. | ||
| Prior Publication US 2005/0001217 A1, Jan. 06, 2005 | ||
| Int. Cl. H01L 29/15 (2006.01); H01L 31/0312 (2006.01) | ||
| U.S. Cl. 257—77 [257/288; 257/289; 257/472; 257/618; 257/E29.026; 257/E29.027; 257/E29.104; 257/E29.106; 257/E29.254] | 13 Claims |
| 1. A semiconductor device comprising:
a first silicon carbide layer provided on a principal surface of a substrate;
a dopant diffused well region provided in a part of the first silicon carbide layer and including a dopant of a second conductivity
type;
a high-concentration dopant diffused source region provided in a part of the dopant diffused well region and including a dopant
of a first conductivity type;
a second silicon carbide layer formed on at least a part of the high-concentration dopant diffused source region, on the dopant
diffused well region, and on the first silicon carbide layer by epitaxial growth; and
a channel layer provided in a part of the second silicon carbide layer and extended over at least a portion of the high-concentration
dopant diffused source region, the dopant diffused well region, and the first silicon carbide layer,
wherein upper surfaces of the high-concentration dopant diffused source region, the dopant diffused well region, and the first
silicon carbide layer are on the same plane,
the upper surface of the channel layer being smoother than that of the first silicon carbide layer, and
the dopant of the first conductivity type is different than the dopant of the second conductivity type.
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